Silicon to CPU

The following topics will be discussed in this section:

Why Silicon?

The reason that processors are so fast is that they rely on solid-state rather than mechanical technology, i.e. there are no moving parts. The chip is a complex assembly of transistors that do no more than determine the flow of current through it, depending on electrical inputs at any given time. Because the chip essentially performs at the electrical level (by either permitting or denying the flow of current through specific 'channels'), it is able to perform almost infinitely faster than any mechanical device. The specifics of what transistors do and how they are assembled to perform complex functions is discussed later. For now, it is sufficient to say that the most important property of a chip is that it must be able to regulate its own electrical properties in order to permit or deny the flow of electrical current depending on circumstances. For this reason, it must be made from a semiconducting material.

There are no prizes awarded at this stage for guessing that the choice semiconductor for creating a chip is silicon. However, pure silicon does not conduct electricity sufficiently to meet the demans of the CPU, so it must be modified chemically.

Now that we have discussed (if only vaguely) why silicon is used, we can go on to describe the entire process of manufacturing a CPU.

Creating Silicon Wafers

The first stage is to obtain and purify the silicon. Silicon does not occur in nature in its pure form, but usually as silicon dioxide - aka silica, most commonly in the form of quartz.

This silica is converted to pure silicon by first reducing it in a coke furnace, followed by chemical purification. (As anyone with a GCSE in chemistry can tell you, one definition of reduction is the removal of oxygen from a compound.) The next step is to 'grow' large uniform silicon crystals which are shaped into ingots of pure grey silicon 10 to 30cm in diameter:

Silicon ingots

The purified ingot is then sliced into microscopically thin circular wafers, typically with a diamond saw, washing at every stage to remove any dust particles. The wafers are polished to remove defects, resulting in a near-perfect mirror-like surface. A single wafer provides the base for creating several (in the order of a hundred or so) chips.

The diagram on the right below shows the area of silicon used for each chip - also known as the die area. However, the chip is a three dimensional structure and is typically assembled from around twenty such wafer layers. Each individual layer must undergo a complex chemical treatment that allows transistors and other electrical components (of which there may be millions) to be properly formed.

Silicon wafers Silicon wafer

Photolithography

The next stage is to actually create the transistors and data pathways in the silicon, based on a design pattern. The three dimensional design pattern is broken down into layers called masks. These masks are made of metal. The pattern exhibited by each mask can then be etched into the silicon surface, most commonly using a process called photolithography.

First, the surface of the wafer is oxidised to produce a protective silicon dioxide layer. Then, a layer of light-sensitive polymer is added, called photoresist.

Coating with photoresist

Light is shone through the first metal patterned mask and focused through a lens onto a chip-sized portion of the wafer. Where the light is able to pass through the mask, it reacts with the photoresist layer. Some treatments cause the photoresist to harden so that the non-hardened (non-exposed) regions of the resist can be chemically removed. This is called negative resist and leaves an etched pattern on the surface of the chip. Alternatively, the light may cause the resist to soften, so that exposed regions can be removed chemically: positive resist.

Photolithography

The same etched pattern can then be transferred to the silicon dioxide layer (which does not conduct) and the resist is then removed completely.

This paves way for the doping step in which dopant substances, such as boron or arsenic, are forced into silicon dioxide-free areas, typically by an ionisation process. Doping alters the electrical properties in the silicon dioxide-free areas, thereby forming features such as transistors. The process is repeated for each mask in turn, using different chemicals and dopants at different stages. This creates a three dimensional pattern of conductivity in the silicon dioxide surface. Conductive metallic contacts - traditionally aluminium, although copper technology is becoming more prevalent - can then be added to make connections, sometimes vertically as well as horizontally.

Packaging

Finally, the multilayered wafer is diced to form chips (at this stage they are called dies) which are packed into a protective metallic, plastic or ceramic package. Metallic pins are added to allow the chip to make electrical contact with the motherboard. It is this finished product that we can actually see, for example, as an Intel Pentium or AMD Athlon. If you were to take the back off such a chip and take a look at it with a microscope, it would look something like this (note, you can just make out the pins on the sides) ...

Underneath the packaging

Due to imperfections in the silicon wafers, the quality of the many CPUs produced by a given set of wafers varies tremendously. At the testing stage it is found that many of the chips are useless. Hence the yield from the manufacturing process is not 100%. It is interesting to note that a given run will therefore also yield a batch of chips with a range of processor speeds, even though they are all designed to be identical. Once again, this is because of imperfect nature of the wafers. An 800MHz chip and a 900MHz chip could both come from the same batch. It is simply that the lower rated chip fails the tests at a lower level of stringency.

Process Size

In order to make the chips that are the 'brains' of our computer more effective, they have to be able to perform more and more complex tasks, while at the same time they must get faster. It doesn't take too much of a leap of faith to guess that the internal architectures of these chips must also get more and more complicated and this means we have to pack more into them. In the end, what it comes down to is fitting more and more transistors into a given area. This means we have to make the transistors smaller.

The features created using the techniques described above are only fractions of a micrometer (one micrometer - aka micron - is 1x10-6 metres - a millionth of a metre or a thousandth of a millimeter) across. The size of these features for any given chip is referred to as the process size. Over twenty years ago, chips typically had a process size of about 10 microns. These days, chips have a process size as low as 0.13 microns, with 90nm (0.09 microns) already available. (For a full list of chip Process Sizes, check out the CPU History section.)

Obviously, the smaller the process size, the more transistors can be squeezed into a given area of silicon. In principle, reducing the feature size allows any given processor to built on a smaller die (and therefore more chips can be cut from the wafer), run faster and consume less current.

However, as process size is reduced and transistors get smaller, it becomes more difficult to prevent current from 'leaking' from them. The result is that power consumption actually increases, resulting in a corresponding increase in operating temperature.

Switching to Copper

One barrier to reducing process size is the use of aluminium to interconnect features. With current feature sizes, aluminium simply is not conductive enough to permit a sufficiently rapid flow of current. The resistance in the copper causes the chips to run too hot.

One way around this is the use of copper technology since copper is a better conductor than aluminium. Thus the feature size (and therefore the subsequent die size) is reduced.

Copper technology had previously proved impossible to implement since the copper was found to diffuse into the silicon dioxide layers used. This can now be circumvented by coating the chip with a barrier layer after photolithography, which prevents the copper from reacting with the silicon dioxide.

Moore's Law

Gordon Moore predicted in 1965, when he was chairman of Intel, that the number of transistors in a given area of integrated circuit (silicon chip) would double every eighteen months. This is known as Moore's Law and his prediction has held true for an astonishing amount of time.

Moore's Law

However, the trend cannot continue at the same rate using the current current CPU etching method of photolithography. This is due to a physical limitation as a result of the wavelengths of light used in the photolithography step. Put simply, the wavelength of light is too great to allow etching to be carried out with any more precision that it is now. If process technology is to get much smaller, chip manufacturers will soon have to develop different lithography approaches, such as the use of X-rays.

Move on to the Basic Components page to read about transistors and how they come together at higher levels of organisation to form gates and registers.