Memory - Organisation


Storing Bits - Memory Cells

Memory is integral to the working of a computer. Essentially, all data in the computer is transferred as a bits, i.e. 1s and 0s. (See the Bits and Bytes page for more information.) It is the job of memory on the computer to store these bits of information. How is this accomplished?

Well, as with just about all other microcomponents in the computer, memory chips are assembled from silicon-based transistors and associated components. These silicon components are grouped as memory cells which store state as a bit value of 0 or 1. To summarise so far, a single memory cell stores a single bit. However, a single bit can't communicate anything useful. Memory chips are assembled from many, many memory cells and then these chips are housed in oblong plastic casings with metal contacts on the bottom to carry voltage.


Organising Cells into Chips

Clearly, a single bit is not very useful, especially if the CPU needed a dedicated line for each and every memory cell that it might have to access. Therefore cells are grouped together into memory chips (not to be confused with memory sticks, such as SIMMs and DIMMs, that I will discuss later.)

Before discussing the organisation of memory any further, there are a few things you need to know. Firstly, you should be aware that memory is typically read by the CPU in units called words. When the CPU issues a read request to memory, it does not fetch a single bit as this would be very inefficient. Instead, it fetches a word, and the size of the word depends on the architecture of the computer system. A word is the number of bits fetched or written by the CPU in a single memory access. It may be worth reviewing the Bits, Bytes and Words page for more details.

Secondly, you should be aware than during a read/write operation, the address of the word to be read or written to (in memory) is encoded using the address bus. The data that is then fetched/written flows along the data bus. These buses connect the CPU to memory (and to other I/O devices). Find out more details about a computer's bus arrangement by visiting the Bus section.

Each line of the address bus must make contact with the memory chips. This happens at connectors called pins. To reduce the number of pins required, memory is usually accessed by splitting a given word's address into a row and column address.

Consider, for example, a 20 bit address bus (such as would be found on an old 8086 computer). 20 bits allows us to specify 220 different addresses, i.e. 1048576. Thus we can access any bit in a one megabit memory chip. However, it is much more efficient if we organise such a memory chip into 1024 rows of 1024 columns of memory cells. This is referred to as a 1K by 1K array of memory cells. Now, 10 bits of the address specify the row address, and the other 10 bits specify the column address.

When a memory access is required, the computer first applies the row address to the memory chip in a process known as the Row Address Strobe (RAS). The result is that all memory cells in this row are switched to a state which allows them to be read. The computer then applies the column address in the Column Address Strobe (CAS). This causes the data at the selected memory cell to appear on that memory chip's data pin, i.e. the one connected to the computer's data bus.

What's next

The next section looks at Memory Types, i.e. DRAM and SRAM, plus how they are organised in modern computers.